1. Technical Field
The invention disclosed broadly relates to data processing and more particularly relates to data processing apparatus and methods employing multiple execution units.
2. Background Art
The typical vonNeuman type computer carries out a time sequential execution of a linear sequence of instructions, where the single execution unit devotes its full time and attention to the execution of the current instruction, obtaining the result thereof before commencing the execution of the next sequential instruction. Advances have been made in the prior art to perform at least a partial execution of a next instruction while the execution of a current instruction is being completed. For example, U.S. Pat. No. 3,629,853 to Newton, assigned to IBM Corporation, provides for overlapping the memory fetch operation of a next instruction with the execution of an existing instruction. This concept of overlapped execution of sequential instructions is carried further in the U.S. Pat. No. 4,399,507 to Cosgrove, et al., assigned to IBM Corporation, wherein a instruction execution pipeline is created with four stages which are instruction fetch, data store address generation, data storage control, and arithmetic logic execution. Other techniques for speeding up the sequential execution of an instruction stream can be performed for those tasks which have highly repetitive subtasks such as in digital signal processing, where parallel execution units can be programmed to carry out simultaneous and identical operations on different blocks of data, as for example in U.S. Pat. No. 4,041,461 to Kratz, et al., assigned to IBM Corporation. Multiprocessing networks have been proposed, as in U.S. Pat. No. 4,149,243 to Wallace, assigned to IBM Corporation, wherein several data processors operating on separate instruction streams, are interlinked and can perform mutually dependent operations, by means of post and wait logic. However, no prior art has proposed an efficient method for providing parallel execution units which operate on a single instruction stream so as to efficiently perform mutually dependent functions.